Si, SiGe Nanowire Devices by Top–Down Technology and Their Applications
نویسندگان
چکیده
Nanowire (NW) devices, particularly the gate-allaround (GAA) CMOS architecture, have emerged as the frontrunner for pushing CMOS scaling beyond the roadmap. These devices offer unique advantages over their planar counterparts which make them feasible as an option for 22-nm and beyond technology nodes. This paper reviews the current technology status for realizing the GAA NW device structures and their applications in logic circuit and nonvolatile memories. We also take a glimpse into applications of NWs in the “more-than-Moore” regime and briefly discuss the application of NWs as biochemical sensors. Finally, we summarize the status and outline the challenges and opportunities of the NW technology.
منابع مشابه
Atomistic approach to study charge and current distribution in ultra - scaled
Submitted for the MAR10 Meeting of The American Physical Society Atomistic approach to study charge and current distribution in ultra-scaled SiGe/Si core/shell nanowire FETs ABHIJEET PAUL, SAUMITRA MEHROTRA, MATHIEU LUISIER, GERHARD KLIMECK, Purdue University — Recent development in the fabrication processes have enabled the manufacturing of ultra-scaled, high mobility SiGe/Si core/shell nanowi...
متن کاملHigh mobility Si1-xGex PMOS transistors to 5K
P-channel Sil-@ex MOSFETs with peak Ge content x =0.3, 0.4, and 0.5 have been fabricated via MBE and experimentally characterized from room temperature down to 5K. Mobility enhancements relative to identically processed Si controls were largest at the lowest tempera2 tures. The highest mobility measured, pm = 1622 cm N.sec for the x = 0.3 SiGe device, was approximately a factor of four higher t...
متن کاملGate-All-Around Silicon Nanowire MOSFETs: Top-down Fabrication and Transport Enhancement Techniques
Scaling MOSFETs beyond 15 nm gate lengths is extremely challenging using a planar device architecture due to the stringent criteria required for the transistor switching. The top-down fabricated, gate-all-around architecture with a Si nanowire channel is a promising candidate for future technology generations. The gate-all-around geometry enhances the electrostatic control and hence gate length...
متن کاملAtomistic Simulations for SiGe pMOS Devices - Bandstructure to Transport
Introduction: SiGe pMOSFETs show considerable improvements in device performance due to the smaller hole effective mass exhibited by Ge.Further improvement in device performance can be obtained by growing pseudomorphically compressively strained SiGe on Si. Despite a lattice mismatch of ~4% between Si and Ge, researchers have been recently able to fabricate ultrathin body and nanowire pMOSFETs ...
متن کاملModeling and Analysis of Core-Shell Si/SiGe Nanowires
In this thesis, I present a theoretical model for the Si core/SiGe shell core-shell nanowire system. A model for the single carrier pocket core-shell nanowire is first developed, along with the boundary conditions of a circular wire and sharp interfaces between the two media. A numerical scheme is then developed for the core-shell nanowire system, along with educated approximations for the nume...
متن کامل